3D revolution in GaN transistors
Cambridge Electronics, Inc. (CEI) has pioneered a new way of making GaN devices: 3DGaN technology. Unlike the conventional 2D structure used in previous generation GaN devices, a third dimension utilized by our 3DGaN technology opens up new possibilities that were not accessible before.
Recognized by the IEEE Electron Devices Society's George E. Smith Award, our team continues to innovate and push the boundaries of GaN technology.
Recognized by the IEEE Electron Devices Society's George E. Smith Award, our team continues to innovate and push the boundaries of GaN technology.
Normally-off technology
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Normally-off transistors have the advantage of blocking high voltages without the need of an extra negative bias to the gate terminal. As a result, they are the most common building blocks for power electronics systems. Our team has developed true normally-off transistors with high threshold voltage, giving the extra margin needed for high-voltage, fast-switching operations. |
Technology scales from 4" to 8"
From 4" to 8", with feature sizes down to 100 nm, our technology platform redefines what is possible with GaN: spanning applications from 10V to over 1kV, from power electronics to 5G communications.
Superior reliability from physics based design
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Over the past 13 years, our team has been at the cutting-edge of GaN research, revealing the physics governing breakdown mechanisms [1], dynamic on-resistance [2], dielectric-GaN interface traps [3], and degradation mechanisms [4]. Building on this strong foundation, we take a physics-focused approach to design devices with superior performance and reliability.
[1] B. Lu, E. L. Piner and T. Palacios, “Breakdown Mechanism in AlGaN/GaN HEMTs on Si Substrate”, in IEEE 68th Device Research Conf. (DRC) Dig., Jun. 2010, pp.193-194. [2] B. Lu, T. Palacios, D. Risbud, S. Bahl and D. I. Anderson, “Extraction of dynamic on-resistance in GaN transistors under soft-and hard-switching conditions,” in IEEE Compound Semiconductor Integrated Circuit Symp. (CSICS), Oct. 2011, pp. 1-4. [3] B. Lu, M. Sun and T. Palacios, “Interface Analysis and Modeling of Normally-Off GaN MISFETs with an Etch-Stop-Barrier Structure,” presented at 10th International Conference on Nitride Semiconductors (ICNS-10), Washington DC, Aug. 2013. [4] B. Lu, F. Gao, C.V. Thompson, T. Palacios, “Role of Electrochemical Reactions in the Degradation Mechanisms of AlGaN/GaN HEMTs,” invited talk at CS Mantech, Denver, May 2014. |
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