3D revolution in GaN transistors
Cambridge Electronics, Inc.(CEI) is proud to introduce 3DGaN® technology, which provides a new degree of freedom in design that is not available to the conventional planar GaN device. This allows our devices to achieve several competitive advantages over Si and planar GaN transistors. More details can be found below.
Higher Efficiency in Power Conversion
Every year 20,000 TWh (20,000,000,000 kWh) of electricity is generated around the world. The majority of electricity undergoes voltage and frequency conversion steps which together waste nearly 15% of the energy. Such loss is equivalent to the total annual electricity consumption of U.S. households.
CEI’s 3DGaN® technology overcomes the efficiency limitations of conventional planar GaN devices and is able to achieve a 75% reduction in energy loss with a significantly smaller module size.
CEI’s 3DGaN® technology overcomes the efficiency limitations of conventional planar GaN devices and is able to achieve a 75% reduction in energy loss with a significantly smaller module size.
High Customization Flexibility with Fast Turnaround Speed
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No one-size-fits-all shoes, nor do power transistors. With 3DGaN® technology, we can offer unprecedented flexibility in customization to our clients.
To meet the needs of the rapidly changing market, the short turnaround time from design to production of a power transistor is crucial for our customers to succeed. We have the expertise and technology to accelerate design and process cycles. We’ll get the right product to you in a fraction of the time. |
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Lower Cost Enabled by CMOS Compatible Process
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In Cambridge Electronics, Inc., we have developed a CMOS compatible process for 3DGaN® transistors. With the massive availability of CMOS compatible foundry, the cost of processing can be significantly reduced.
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Superior reliability from physics based design and characterization
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Our team’s strong background and experience in semiconductor physics allow us to take a design-for-reliability approach in the design of our devices. We are tackling device reliability issues by mitigating the underlining device degradation mechanisms with simulation based device designs and processes. We also employ all cutting edge material characterization methods to confirm the reliability on nano scale.
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